Pillar Axiom: Howto interpret a PSG_DMS_EVENT

Asset ID:	1-72-1485773.1
Update Date:	2012-10-04
Keywords:

Solution Type Problem Resolution Sure

Solution 1485773.1 : Pillar Axiom: Howto interpret a PSG_DMS_EVENT_ECC event

Applies to:

Pillar Axiom 300 Storage System - Version All Versions and later
Pillar Axiom 600 Storage System - Version All Versions and later
PillarAxiom 500 Storage System - Version All Versions and later
Information in this document applies to any platform.

Symptoms

The event PSG_DMS_EVENT_ECC is logged for each single bit ECC (Error Correcting Code) event within slammer memory.

Cause

The Axiom Slammer has ECC scrubbing to check for single bit memory errors since volatile memory can degrade over time or due to environmental issues.

Solution

If there are multiple addresses and you are seeing a hundred or so events please consider a motherboard replacement (the Slammer motherboard is the orderable FRU containing the memory).

If the frequency / count is much lower or if it is the same address that is being registered then replacement would not be warranted as the threshold of these anticipated single bit corrections has not been reached.

Note; If a double bit memory error is encountered the slammer control unit will fail over and go disabled at which time the slammer motherboard should be replaced.

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