Document Audience: | INTERNAL |
Document ID: | I0762-1 |
Title: | The clock selection on an initial batch of FRU and shipped in product System Controllers is set to use a clock synthesizer causing the clock failover feature to be disabled |
Copyright Notice: | Copyright © 2005 Sun Microsystems, Inc. All Rights Reserved |
Update Date: | 2002-01-30 |
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- Sun Proprietary/Confidential: Internal Use Only -
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FIELD INFORMATION NOTICE
(For Authorized Distribution by SunService)
FIN #: I0762-1
Synopsis: The clock selection on an initial batch of FRU and shipped in product System Controllers is set to use a clock synthesizer causing the clock failover feature to be disabledCreate Date: Jan/29/02
Keywords:
The clock selection on an initial batch of FRU and shipped in product System Controllers is set to use a clock synthesizer causing the clock failover feature to be disabled
SunAlert: No
Top FIN/FCO Report: Yes
Products Reference: Sun Fire 3800/4800/4810/6800 Servers Clock Setting
Product Category: Server / Service
Product Affected:
Systems Affected
----------------
Mkt_ID Platform Model Description Serial Number
------ -------- ----- ----------- -------------
- S8 ALL Sun Fire 3800 -
- S12 ALL Sun Fire 4800 -
- S12i ALL Sun Fire 4810 -
- S24 ALL Sun Fire 6800 -
X-Options Affected
------------------
Mkt_ID Platform Model Description Serial Number
------ -------- ----- ---------- -------------
- - - - -
Parts Affected:
Part Number Description Model
----------- ----------- -----
501-5563-12 or (lower) ASSY TSTD SP SC RIO Serengeti -
501-5407-13 or (lower) ASSY TSTD SC RIO Serengeti -
References:
BugId: 4521513 - Some shipped and FRU stock SCs have the wrong clock
source selected in NVCI.
ESC: 532415 - Clock fail over not enabled for system with two System
Controllers.
Issue Description:
Systems with a redundant System Controller (SC) that experience a clock
failure, while the clock failover option is disabled, may cause
domains to fail.
System Controller may have an incorrect clock source selection which
will lead to clock failover feature to be disabled and. this may resulted
systems to have functional problem. Especially the systems with two SCs
and the systems that may require a replacement SC may experience this
problem.
Some Sun Fire 3800/4800/4810/6800 systems with redundant System
Controllers (SC) may experience failed domains when clock failover does
not occur after a clock failure. This occurs when the System
Controller has an incorrect clock source selection which causes the
clock failover feature to be disabled, leading to a system
malfunction. If a clock fails and there is a redundant SC, the domains
using the failed clock will not switch over to the redundant clock and
will hang.
Systems at risk are those with two SCs shipped prior to July 2001, or
those where a second SC board has been added from FRUs shipped as
replacement or site-spare prior to July 2001. Affected systems can be
identified by checking the Clock Source value for the master (SSC0) and
slave (SSC1) SC boards. This can be determined in the following ways:
From a master SC (all firmware versions 5.x.y):
-----------------------------------------------
After an SC reboots, the 'showlogs' command from the SC platform shall
have the clock source selection and clock failover information.
. master SC = SSC0
. slave SC = SSC1
hostname:SC> showlogs
Look for the following information:
Clock Source: 12430-synthesizer
Clock failover disabled.
At this point if there are two SC's in the system, one can expect to
see in the showlogs output and two "Clock Source" lines (one for SC0
and one for SC1).
If the clock is set to the synthesizer, then the clock failover feature
will be disabled. Corrective action should be taken.
If the clock is set to 74.91 MHz and the clock failover is disabled,
then the slave SC, if present, has either an incorrect clock source
setting or is not functioning.
If "Clock failover disabled" is observed after "Clock failover enabled"
then the clock failover feature is disabled. This could indicate either
a failed SC, an incorrect clock source setting on one of the SCs,
or system with a single SC.
If the master SC is using a syslog host facility then this information
may also be located there.
For all firmware revisions (5.x.y):
-----------------------------------
Connect to the SC serial console.
After an SC reboots, the following can be observed at the
SC serial console:
System Clock Test
System Clock verify Test
Board0 Clock is selected
MC12430 clock Synthesizer is the selected Clock Source
CLK(Self) :0x0000ffff CLK(Other) : 0x0000fff9
REF : 0x0000222b
CLOCK(SELF) FREQ : 74.92 MHZ
CLOCK(OTHER) FREQ : 74.91 MHZ
Clock Source: 12430-synthesizer
Clock failover disabled.
*** Note the MC12430 clock Synthesizer
*** Note the Clock failover disabled
For firmware 5.12.5 and above:
------------------------------
To determine if clock failover is disabled:
hostname:SC> showboards -p clock
Component SCC0 Signal SCC1 Signal Signal Used Failover
--------- ----------- ----------- ----------- --------
SSC0 OK OK SSC0 Disabled
RP0 OK OK SSC0 Disabled
RP2 OK OK SSC1 Disabled
/N0/SB0 OK OK SSC0 Disabled
/N0/SB2 OK OK SSC0 Disabled
/N0/IB6 OK OK SSC0 Disabled
/N0/IB8 OK OK SSC0 Disabled
If the failover column is "Disabled" and there are two
SC's in the server, the clock failover feature is disabled.
The cause for this problem is that a batch of SC's were NOT
re-programmed during manufacture to use the default 75 MHz clock
source.
Corrective action has been taken in manufacturing to set the
clock source for all SC's to a 75 MHZ clock source.
A bug has been filed, 4521513, but this bug will not be fixed.
It will not be fixed since this was a manufacturing issue and
not a code defect.
Implementation:
---
| | MANDATORY (Fully Proactive)
---
---
| X | CONTROLLED PROACTIVE (per Sun Geo Plan)
---
---
| | REACTIVE (As Required)
---
Corrective Action:
The following recommendation is provided as a guideline for authorized
Enterprise Services Field Representatives who may encounter the above
mentioned problem.
1) Identify that the system has a redundant SC option and the clock failover
is disabled due to an incorrect clock source selection with techniques
discussed above.
If the clock source is set to the clock synthesizer, the following can
be used to correct the clock source selection.
Clock Selection Scenarios:
==========================
SSC0 Clock SSC1 Clock Action
---------- ---------- -----------------------------------------------
75 MHz 75 MHz Expected Clock Scenario (This is good)
75 MHz Synthesizer Schedule downtime and correct SSC1 clock source.
Synthesizer 75 MHz Schedule downtime and correct SSC0 clock source.
Synthesizer Synthesizer Schedule downtime and correct SSC0 and SSC1
clock sources.
---------- ---------- -----------------------------------------------
2) Correct the clock source for SSC1 or SSC0 as needed:
Correct SSC1 clock source:
--------------------------
1. Schedule downtime for all domains in the platform
2. Unseat SSC0
3. Connect to SSC1 via the serial port
** 4. Manually collect 'showplatform -v'
** 5. Manually collect 'showplatform -v -d ' for all domains
6. Use the 'setdefaults' command on SSC1
** 7. Manually enter data from step 4
** 8. Manually enter data from step 5
9. Insert SSC0
10. Reboot SSC1 (guarantee we start SSC1 from a known state)
11. Reboot SSC0 (guarantee we start SSC0 from a known state)
** NOTE: Steps 4, 5, 7, and 8 do not have to be performed if the customer
is only using SSC1 for clock failover. If their intention is to
keep the same configuration as SSC0 then these steps must be taken.
NOTE: A method for correcting the clock selection exists using engineering
mode. This method does not require moving any components or using
'setdefaults'.
Correcting SSC0 clock source:
-----------------------------
1. Schedule downtime for all domains in the platform
2. Connect to SSC0 via the serial port
3. Manually collect 'showplatform -v'
4. Manually collect 'showplatform -v -d ' for all domains
5. Use the 'setdefaults' command on SSC0
6. Manually enter data from step 3
7. Manually enter data from step 4
8. Reboot SSC0
This method requires assistance from the Sun Fire Service Control
Center.
Engineering (expert) mode is password protected and requires
assistance from the Sun Fire Service Control Center:
Sun Fire Service Control Centers
--------------------------------
Americas: http://cccweb.ebay.sun.com/ccc/groups/sunfire/
APAC: http://apac-scc.singapore/
EMEA: http://jfk.france/serengeti/sscc/sscc.html
Only Sun employees will be given engineering mode access.
Comments:
============================================================================
Implementation Footnote:
i) In case of MANDATORY FINs, Enterprise Services will attempt to
contact all affected customers to recommend implementation of
the FIN.
ii) For CONTROLLED PROACTIVE FINs, Enterprise Services mission critical
support teams will recommend implementation of the FIN (to their
respective accounts), at the convenience of the customer.
iii) For REACTIVE FINs, Enterprise Services will implement the FIN as the
need arises.
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