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| Document ID: | I0396-1 |
| Title: | Memory location MM to P Translation Map for the Enterprise 10000 Server. |
| Copyright Notice: | Copyright © 2005 Sun Microsystems, Inc. All Rights Reserved |
| Last Updated Date: | 2004-01-07 |
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- Sun Proprietary/Confidential: Internal Use Only -
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FIELD INFORMATION NOTICE
(For Authorized Distribution by SunService)FIN #: I0396-1
Synopsis: Memory location MM to P Translation Map for the Enterprise 10000 Server.Create Date: 07/02/98
Keywords:
Memory location MM to P Translation Map for the Enterprise 10000 Server.
Top FIN/FCO Report: Yes
Products Reference: ECC Error Reporting
Product Category: Server / / Memory / Service
Product Affected:
Systems Affected
------- ---------
Mkt_ID Platform Model Description Serial Number
------ -------- ----- ----------- -------------
E10000 E10000 E10000-X Enterprise 10000 Server -
X-options Affected
--------- --------
X2750A - - System Service Processor -
E10000-SW-SSP-3.1 - - System Service Processor 3.1 -
SOLS-2.5.1NOV97 - - Solaris 2.5.1 Server Edition -
SOLMS-26EW9999 - - Solaris 2.6 Server Edition -
Parts Affected:
Part Number Description Model
----------- ----------- -----
- - -References:
BugId: 4137422, 4137584
Issue Description:
Ultra Enterprise 10000 systems may experience the symptoms listed below,
when ECC memory errors are encountered.
i) E10000 systems using SSP 3.1 with domain OS level 2.5.1, may experience
ECC memory error messages that are truncated, thus the MM numbers are
missing from the error message output. The P number is still readable
and can be used to determine the location of the failed DIMM.
ii) If the domain OS is 2.6, the P number (and the MM number if visible)
may be incorrectly reported. In this case the data from record stops
associated with the ECC error should be used to pinpoint the failed
DIMM.
*Sample of truncated error messages shown below:
Apr 24 03:53:40 unix: CPU2 CE Error: AFSR 0x00000000 00100000, AFAR 0x00-
0342bf38, SIMM at physical address 0 342bf30 Board# 0 Bank# 0 P# P10 MM
Apr 24 03:53:40 unix: Softerror: Persistent ECC Memory Error
Apr 24 09:32:34 unix: CPU2 CE Error: AFSR 0x00000000 00100000, AFAR 0x00-
3faa8d18, SIMM at physical address 0 3faa8d10 Board# 0 Bank# 0 P# P10 M
Apr 24 09:32:34 unix: Softerror: Persistent ECC Memory Error
Apr 24 15:53:40 unix: CPU2 CE Error: AFSR 0x00000000 00100000, AFAR 0x00-
0342bf38, SIMM at physical address 0 342bf30 Board# 0 Bank# 0 P# P10 MM
Apr 24 15:53:40 unix: Softerror: Persistent ECC Memory Error
Apr 24 21:32:34 unix: CPU0 CE Error: AFSR 0x00000000 00100000, AFAR 0x00-
3faa8d18, SIMM at physical address 0 3faa8d10 Board# 0 Bank# 0 P# P10 M
Apr 24 21:32:34 unix: Softerror: Persistent ECC Memory Error
Apr 25 03:53:40 unix: CPU0 CE Error: AFSR 0x00000000 00100000, AFAR 0x00-
0342bf38, SIMM at physical address 0 342bf30 Board# 0 Bank# 0 P# P10 MM
Apr 25 03:53:40 unix: Softerror: Persistent ECC Memory Error
Apr 25 09:32:34 unix: CPU2 CE Error: AFSR 0x00000000 00100000, AFAR 0x00-
3faa8d18, SIMM at physical address 0 3faa8d10 Board# 0 Bank# 0 P# P10 M
* The error message shown above, serves as an example ONLY. Actual E10000
ECC Memory Error messages will vary slightly.Implementation:
---
| | MANDATORY (Fully Pro-Active)
---
---
| X | CONTROLLED PRO-ACTIVE (Per Sun Geo Plan)
---
---
| | REACTIVE (As Required)
---Corrective Action:
In response to the above stated problem with truncated ECC memory error
messages with domain OS level 2.5.1 and the incorrect P number reporting
of domain OS level 2.6, the following recommendation has been issued for
the resolution of each problem.
1. Apply the appropriate patch for the respective Solaris release:
On the SSP:
a. Install Patch 105684-03 for Solaris 2.5.1 fixes BugID: 4137422
On the E10k domains:
b. Install Patch 105181-06 for Solaris 2.6 fixes BugID: 4137584
The MM to P conversion chart shown below, is offered as an additional tool
for troubleshooting Ultra Enterprise 10000 ECC memory errors.
MM to P# Conversion Chart
--------------------------
________________________________ ________________________________
|___________MM3.7-P32__________| |___________MM3.3-P31__________|
________________________________ ________________________________
|___________MM1.7-P30__________| |___________MM1.3-P29__________|
________________________________ ________________________________
|___________MM3.6-P28__________| |___________MM3.2-P27__________|
________________________________ ________________________________
|___________MM1.6-P26__________| |___________MM1.2-P25__________|
________________________________ ________________________________
|___________MM3.5-P24__________| |___________MM3.1-P23__________|
________________________________ ________________________________
|___________MM1.5-P22__________| |___________MM1.1-P21__________|
________________________________ ________________________________
|___________MM3.4-P20__________| |___________MM3.0-P19__________|
________________________________ ________________________________
|___________MM1.4-P18__________| |___________MM1.0-P17__________|
________________________________ ________________________________
|___________MM2.7-P16__________| |___________MM2.3-P15__________|
________________________________ ________________________________
|___________MM0.7-P14__________| |___________MM0.3-P13__________|
________________________________ ________________________________
|___________MM2.6-P12__________| |___________MM2.2-P11__________|
________________________________ ________________________________
|___________MM0.6-P10__________| |___________MM0.2-P9___________|
________________________________ ________________________________
|___________MM2.5-P8___________| |___________MM2.1-P7___________|
________________________________ ________________________________
|___________MM0.5-P6___________| |___________MM0.1-P5___________|
________________________________ ________________________________
|___________MM2.4-P4___________| |___________MM2.0-P3___________|
________________________________ ________________________________
|___________MM0.4-P2___________| |___________MM0.0-P1___________|
Centerplane Side
DIMM to Bits | MM to Banks
------------ | -----------
DIMM 0: lo half bits [17:0] | MM0 = Bank 0
DIMM 1: lo half bits [35:18] | MM1 = Bank 1
DIMM 2: lo half bits [53:36] | MM2 = Bank 2
DIMM 3: lo half bits [71:54] | MM3 = Bank 3
DIMM 4: hi half bits [17:0] |
DIMM 5: hi half bits [35:18] |
DIMM 6: hi half bits [53:36] |
DIMM 7: hi half bits [71:54] |
Bank 0
DIMM BITS MM P#
----------------------------------------
0 0-17 0_0 1 LOW
1 18-35 0_1 5 HALF
2 36-53 0_2 9
3 54-71 0_3 13
----------------------------------------
4 0-17 0_4 2 HIGH
5 18-35 0_5 6 HALF
6 36-53 0_6 10
7 54-71 0_7 14
----------------------------------------
Bank 1
DIMM BITS MM P#
----------------------------------------
0 0-17 1_0 17 LOW
1 18-35 1_1 21 HALF
2 36-53 1_2 25
3 54-71 1_3 29
----------------------------------------
4 0-17 1_4 18 HIGH
5 18-35 1_5 22 HALF
6 36-53 1_6 26
7 54-71 1_7 30
----------------------------------------
Bank 2
DIMM BITS MM P#
----------------------------------------
0 0-17 2_0 3 LOW
1 18-35 2_1 7 HALF
2 36-53 2_2 11
3 54-71 2_3 15
----------------------------------------
4 0-17 2_4 4 HIGH
5 18-35 2_5 8 HALF
6 36-53 2_6 12
7 54-71 2_7 16
----------------------------------------
Bank 3
DIMM BITS MM P#
----------------------------------------
0 0-17 3_0 19 LOW
1 18-35 3_1 23 HALF
2 36-53 3_2 27
3 54-71 3_3 31
----------------------------------------
4 0-17 3_4 20 HIGH
5 18-35 3_5 24 HALF
6 36-53 3_6 28
7 54-71 3_7 32
----------------------------------------Comments:
The implementation status of this FIN has been upgraded to "CONTROLLED
PRO-ACTIVE". This action is warranted due to the fact the "CORRECTIVE
ACTION:" states to install a patch to avoid the reported problem. This
action fits the criteria for the implementation status of "CONTROLLED
PRO-ACTIVE".
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Implementation Footnote:
________________________
i) In case of MANDATORY FINs, Enterprise Services will attempt to contact
all affected customers to recommend implementation of the FIN.
ii) For CONTROLLED PROACTIVE FINs, Enterprise Services mission critical sup-
port teams will recommend implementation of the FIN (to their respective
accounts), at the convenience of the customer.
iii) For REACTIVE FINs, Enterprise Services will implement the FIN as the need
arises.
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