Sun System Handbook - ISO 3.4 June 2011 Internal/Partner Edition | |||
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Solution Type Technical Instruction Sure Solution 1006320.1 : Cheatsheet for V20z and V40z Post Codes
PreviouslyPublishedAs 208871 Description The BIOS displays an error message or a series of messages on the video display in the event of hardware or configuration errors. In some cases the error may be so severe that there is no video output. However, the error can also be retrieved by means of the service processor. By using the "sp get port80" command from the service processor, the sp captures the last 10 POST codes. For information about retrieving the last port 80 post code using the sp get port80 command, refer to the Sun Fire V20z[TM] Server Management Guide, 817-5249-xx, for details. You can also retrieve the last 10 port 80 post codes using the operator panel. Refer to the Sun Fire V20z Server Management Guide, 817-5249-xx, for more details about using the operator panel menus. Steps to Follow The following lists the POST codes and their descriptions for the Sun Fire [TM] V20z and Sun Fire V40z[TM] servers BIOS. POST Code / Description 02 Verify real mode 03 Disable non-maskable interrupt (NMI) 04 Get CPU type 06 Initialize system hardware 07 Disable shadow and execute code from the ROM 08 Initialize chipset with initial POST values 09 Set IN POST flag 0A Initialize CPU registers 0B Enable CPU cache 0C Initialize caches to initial POST values 0E Initialize I/O component 0F Initialize the local bus IDE 10 Initialize power management 11 Load alternate registers with initial POST values 12 Restore CPU control word during warm boot 13 Initialize PCI bus mastering devices 14 Initialize keyboard controller 16 BIOS ROM checksum 17 Initialize cache before memory autosize 18 8254 programmable interrupt timer initialization 1A 8237 DMA controller initialization 1C Reset programmable interrupt controller 20 Test DRAM refresh 22 Test 8742 keyboard controller 24 Set ES segment register to 4GB 26 Enable gate A20 line 28 Autosize DRAM 29 Initialize POST memory manager 2A Clear 512KB base RAM 2C RAM failure on address line xxxx 2E RAM failure on data bits xxxx of low byte of memory bus 2F Enable cache before system BIOS shadow 30 RAM failure on data bits xxxx of high byte of memory bus 32 Test CPU bus clock frequency 33 Initialize Phoenix Dispatch Manager 36 Warm start shut down 38 Shadow system BIOS ROM 3A Autosize cache 3C Advanced configuration of chipset registers 3D Load alternate registers with CMOS values 41 Initialize extended memory for RomPilot 42 Initialize interrupt vectors 45 POST device initialization 46 Check ROM copyright notice 47 Initialize I20 support 48 Check video configuration against CMOS 49 Initialize PCI bus and devices 4A Initialize all video adapters in system 4B QuietBoot start (optional) 4C Shadow video BIOS ROM 4E Display BIOS copyright notice 4F Initialize MultiBoot 50 Display CPU type and speed 51 Initialize EISA board 52 Test keyboard 54 Set key click if enabled 55 Enable USB devices 58 Test for unexpected interrupts 59 Initialize POST display service 5A Display prompt "Press F2 to enter SETUP" 5B Disable CPU cache 5C Test RAM between 512KB and 640KB 60 Test extended memory 62 Test extended memory address lines 64 Jump to UserPatch1 66 Configure advanced cache registers 67 Initialize Multi Processor APIC 68 Enable external and CPU caches 69 Setup system management mode (SMM) area 6A Display external L2 cache size 6B Load custom defaults (optional) 6C Display shadow area message 6E Display possible high address for UMB recovery 70 Display error messages 72 Check for configuration errors 76 Check for keyboard errors 7C Set up hardware interrupt vectors 7D Size Intelligent System Monitoring 7E Initialize coprocessor if present 80 Disable onboard super I/O ports and IRQ's 81 Late POST device initialization 82 Detect and install external RS232 ports 83 Configure non-MCD IDE controllers 84 Detect and install external parallel ports 85 Initialize PC compatible PnP ISA devices 86 Reinitialize onboard I/O ports 87 Configure motherboard configurable devices (optional) 88 Initialize BIOS data area 89 Enable non-maskable interrupts (NMIs) 8A Initialize extended BIOS data area 8B Test and initialize PS/2 mouse 8C Initialize floppy controller 8F Determine number of ATA drives (optional) 90 Initialize hard disk controllers 91 Initialize local bus hard disk controllers 92 Jump to UserPatch2 93 Build MPTABLE for multi processor boards 95 Install CD ROM for boot 96 Clear huge ES segment register 97 Fixup multi processor table 98 Search for option ROMs 99 Check for SMART drive (optional) 9A Shadow option ROMs 9C Set up power management 9D Initialize security engine (optional) 9E Enable hardware interrupts 9F Determine number of ATA and SCSI drives A0 Set time of day A2 Check key lock A4 Initialize typematic rate A8 Erase F2 prompt AA Scan for F2 key stroke AC Enter setup AE Clear boot flag B0 Check for errors B1 Inform RomPilot about the end of POST B2 POST done - prepare to boot operating system B4 One short beep B5 Terminate QuietBoot (optional) B6 Check password B7 Initialize ACPI BIOS B9 Prepare boot BA Initialize DMI parameters BB Initialize PnP option ROMs BC Clear parity checkers BD Display multiboot menu BE Clear screen BF Check virus and backup reminders C0 Try to boot with interrupt 19 C1 Initialize POST Error Manager (PEM) C2 Initialize error logging C3 Initialize error display function C4 Initialize system error handler C5 PnP dual CMOS (optional) C6 Initialize notebook docking (optional) C7 Initialize notebook docking late C8 Force check (optional) C9 Extended checksum (optional) CA Redirect Int 15h to enable remote keyboard CB Redirect Int 13 to Memory Technologies Devices such as ROM, RAM, PCMCIA, and serial disk CC Redirect Int 10h to enable remote serial video CD Re-map I/O and memory for PCMCIA CE Initialize digitizer and display message D2 Unknown interrupt ---------------------------------------------------------------- *****The following shows the POST codes for the boot block in Flash ROM. 80 Initialize the chipset 81 Initialize the bridge 82 Initialize the CPU 83 Initialize the system timer 84 Initialize system I/O 85 Check force recovery boot 86 Checksum BIOS ROM 87 Go to BIOS 88 Set Huge Segment 89 Initialize Multi Processor 8A Initialize OEM special code 8B Initialize PIC and DMA 8C Initialize Memory type 8D Initialize Memory size 8E Shadow Boot Block 8F System memory test 90I nitialize interrupt vectors 91 Initialize Run Time Clock 92 Initialize video 93 Initialize System Management Manager 94 Output one beep 95 Clear Huge Segment 96 Boot to mini DOS 97 Boot to Full DOS Product Sun Fire V40z Server Sun Fire V20z Server V20z, V40z, post, post codes, errors, no console Previously Published As 79478 Change History Date: 2005-06-06 User Name: 25440 Action: Approved Comment: Publishing. Version: 6 Date: 2005-06-06 User Name: 25440 Action: Accept Comment: Version: 0 For information about retrieving the last port 80 post code using the sp get port80 command, refer to the Sun Fire V20z Server Management Guide, 817-5249-xx, for details. You can also retrieve the last 10 port 80 post codes using the operator panel. Refer to the Sun Fire V20z Server Management Guide, 817-5249-xx, for more details about using the operator panel menus. Version: 0 Attachments This solution has no attachment |
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