SPARCengine CP1500
501-5155 |
595-5040 |
270MHz 256KB 0MB w Front Panel 270-5155-06 |
270MHz 256KB 128MB w/o Front Panel |
Jumper Settings
JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1401 |
1-2 2-3 |
Out In |
FPROM write protect
FPROM write enable |
J1501 |
1-8 |
Out |
JTAG scan connector |
J1502 |
1-2 2-3 |
Out Out |
External clock
Scan clock |
J1601 |
1-2 2-3 |
Out Out |
PCI clock 66/33
PCI clock 33/66 |
J3301 |
1-2 2-3 |
Out Out |
Disable loopback reset
Enable loopback reset |
J3302 |
1-2 2-3 |
Out Out |
Disable user flash write
Enable user flash write |
J3303 |
1-2 2-3 |
In Out |
Boot from FPROM
Boot from ROMBO |
J3304 |
1-2 2-3 |
Out In |
Disable Boot from user flash
Enable Boot from user flash |
J3306 |
2-3 |
In |
7-segment LED display bias |
J3601 |
1-3 |
Out |
Header for I2C EEPROM module |
J3602 |
1-3 |
Out |
Header for I2C EEPROM module |
J4703 |
1-2 2-3 |
Out Out |
PLD TDO
cPCI TDO |
J5102 |
1-2 |
Out |
Thermal diode |
Notes
- NVRAM 100-5892 is soldered to the CP1500.
- The NVRAM uses M4T28 SNAPHAT battery 100-5893.
- The SPARCengine CP1500 does not have a system serial number.
References
- SPARCengine CP1500 Technical Reference Manual, 806-2104.
- SPARCengine CP Memory Installation and Configuration, 806-3690.
SPARCengine CP1500
501-5385 |
595-5094 |
270MHz 256KB 0MB FRU w Front Panel 270-5155-07 |
270MHz 256KB 128MB w/o Front Panel |
Jumper Settings
JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1401 |
1-2 2-3 |
Out In |
FPROM write protect
FPROM write enable |
J1501 |
1-8 |
Out |
JTAG scan connector |
J1502 |
1-2 2-3 |
Out Out |
External clock
Scan clock |
J1601 |
1-3 |
N/A |
Not stuffed |
J3301 |
1-2 2-3 |
Out Out |
Disable loopback reset
Enable loopback reset |
J3302 |
1-2 2-3 |
Out Out |
Disable user flash write
Enable user flash write |
J3303 |
1-2 2-3 |
In Out |
Boot from FPROM
Boot from ROMBO |
J3304 |
1-2 2-3 |
Out In |
Disable Boot from user flash
Enable Boot from user flash |
J3306 |
2-3 |
In |
7-segment LED display bias |
J3601 |
1-3 |
Out |
Header for I2C EEPROM module |
J3602 |
1-3 |
Out |
Header for I2C EEPROM module |
J4703 |
1-2 2-3 |
Out Out |
PLD TDO
cPCI TDO |
J5102 |
1-2 |
Out |
Thermal diode |
Notes
- NVRAM 100-5892 is soldered to the CP1500.
- The NVRAM uses M4T28 SNAPHAT battery 100-5893.
- The CP1500 uses SEEPROM 525-1767.
- The SPARCengine CP1500 does not have a system serial number.
References
- SPARCengine CP1500 Technical Reference Manual, 806-2104.
- SPARCengine CP Memory Installation and Configuration, 806-3690.
SPARCengine CP1500
501-5230 |
595-5039 |
333MHz 0MB FRU w Front Panel 270-5155-06 |
333MHz 128MB w/o Front Panel 501-5230 |
Jumper Settings
JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1401 |
1-2 2-3 |
Out In |
FPROM write protect
FPROM write enable |
J1501 |
1-8 |
Out |
JTAG scan connector |
J1502 |
1-2 2-3 |
Out Out |
External clock
Scan clock |
J1601 |
1-2 2-3 |
Out Out |
PCI clock 66/33
PCI clock 33/66 |
J3301 |
1-2 2-3 |
Out Out |
Disable loopback reset
Enable loopback reset |
J3302 |
1-2 2-3 |
Out Out |
Disable user flash write
Enable user flash write |
J3303 |
1-2 2-3 |
In Out |
Boot from FPROM
Boot from ROMBO |
J3304 |
1-2 2-3 |
Out In |
Disable Boot from user flash
Enable Boot from user flash |
J3306 |
2-3 |
In |
7-segment LED display bias |
J3601 |
1-3 |
Out |
Header for I2C EEPROM module |
J3602 |
1-3 |
Out |
Header for I2C EEPROM module |
J4703 |
1-2 2-3 |
Out Out |
PLD TDO
cPCI TDO |
J5102 |
1-2 |
Out |
Thermal diode |
Notes
- NVRAM 100-5892 is soldered to the CP1500.
- The NVRAM uses M4T28 SNAPHAT battery 100-5893.
- The SPARCengine CP1500 does not have a system serial number.
References
- SPARCengine CP1500 Technical Reference Manual, 806-2104.
- SPARCengine CP Memory Installation and Configuration, 806-3690.
SPARCengine CP1500
501-5383 |
595-5092 |
333MHz 0MB FRU w Front Panel 270-5155-07 |
333MHz 128MB w/o Front Panel 501-5383 |
Jumper Settings
JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1401 |
1-2 2-3 |
Out In |
FPROM write protect
FPROM write enable |
J1501 |
1-8 |
Out |
JTAG scan connector |
J1502 |
1-2 2-3 |
Out Out |
External clock
Scan clock |
J1601 |
1-3 |
N/A |
Not stuffed |
J3301 |
1-2 2-3 |
Out Out |
Disable loopback reset
Enable loopback reset |
J3302 |
1-2 2-3 |
Out Out |
Disable user flash write
Enable user flash write |
J3303 |
1-2 2-3 |
In Out |
Boot from FPROM
Boot from ROMBO |
J3304 |
1-2 2-3 |
Out In |
Disable Boot from user flash
Enable Boot from user flash |
J3306 |
2-3 |
In |
7-segment LED display bias |
J3601 |
1-3 |
Out |
Header for I2C EEPROM module |
J3602 |
1-3 |
Out |
Header for I2C EEPROM module |
J4703 |
1-2 2-3 |
Out Out |
PLD TDO
cPCI TDO |
J5102 |
1-2 |
Out |
Thermal diode |
Notes
- NVRAM 100-5892 is soldered to the CP1500.
- The NVRAM uses M4T28 SNAPHAT battery 100-5893.
- The CP1500 uses SEEPROM 525-1767.
- The SPARCengine CP1500 does not have a system serial number.
References
- SPARCengine CP1500 Technical Reference Manual, 806-2104.
- SPARCengine CP Memory Installation and Configuration, 806-3690.
SPARCengine CP1500
Netra t1 / SPARCengine CP1500
501-5472 |
501-5577 |
501-5640 |
360MHz 0MB FRU w Front Panel |
360MHz 0MB w/o Front Panel Used in Netra t1 |
360MHz 128MB FRU w Front Panel |
595-5254 |
595-5329 |
360MHz 0MB 501-5577 w/o Front Panel Used in Netra t1 |
360MHz 128MB FRU w Front Panel w 501-5640 |
Jumper Settings
JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1001 |
1-2 2-3 |
In In |
Enable active SCSI terminator (default)
Disable active SCSI terminator |
J1002 |
1-2 2-3 |
In In |
Enable SCSI terminator power (default)
Disable SCSI terminator power |
J1401 |
1-2 2-3 |
In In |
FPROM write protect
FPROM write enable (default) |
J1501 |
1-8 |
Out |
JTAG scan connector |
J1502 |
1-2 2-3 |
In In |
External clock (default)
Scan clock |
J3301 |
1-2 2-3 |
In In |
Disable loopback reset
Enable loopback reset (default) |
J3302 |
1-2 2-3 |
In In |
Disable user flash write
Enable user flash write (default) |
J3303 |
1-2 2-3 |
In In |
System flash access by ROMBO
System flash access by J3304 (default) |
J3304 |
1-2 2-3 |
In In |
Boot from user flash0
Boot from system flash (default) |
J3306 |
2-3 |
In |
7-segment LED display bias |
J3401 |
1-3 |
Out |
Header for I2C EEPROM module |
J3601 |
1-3 |
Out |
Header for I2C EEPROM module |
J3602 |
1-3 |
Out |
Header for I2C EEPROM module |
J4703 |
1-2 2-3 |
Out Out |
PLD TDO
cPCI TDO |
J5102 |
1-2 |
Out |
Thermal diode |
Notes
- The minimum SPARCengine CP1500 OS is Solaris 2.6 HW 5/98.
- The minimum Netra t1 Model 100/105 OS is Solaris 2.6 HW 5/98.
References
-
Netra ct Server Service Manual, 806-3296.
- SPARCengine CP1500 Technical Reference Manual, 806-2104.
- SPARCengine CP Memory Installation and Configuration, 806-3690.
SPARCengine CP1500
Netra t1 / Netra ct400 / Netra ct800 / SPARCengine CP1500
501-5473 |
501-5578 |
501-5580 |
501-5731 |
440MHz 500-5654 0MB FRU w Front Panel CP1500 |
440MHz 500-5473 0MB w/o Front Panel Netra t1 |
440MHz 500-5473 256MB FRU w/o Front Panel CP1500 |
440MHz 500-5654 0MB FRU w Front Panel Netra ct400/800 |
501-5795 |
501-5796 |
501-5800 |
501-5826 |
440MHz 501-5731 128MB w Front Panel
Netra ct400/800 |
440MHz 501-5731 512MB w Front Panel
Netra ct400/800 |
440MHz 501-5731 1GB w Front Panel
Netra ct400/800 |
440MHz 501-5654 512MB w/o Front Panel CP1500 |
501-6054 |
501-6055 |
595-5256 |
595-5530 |
440MHz 500-5654 256MB SDRAM w/o Front Panel
CP1500 |
440MHz 500-5654 512MB SDRAM FRU w/o Front Panel
CP1500 |
440MHz 501-5580 256MB OEM FRU
w/o Front Panel CP1500 |
440MHz 501-5826 512MB OEM FRU
w/o Front Panel CP1500 |
Jumper Settings
JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1001 |
1-2 2-3 |
In In |
Enable active SCSI terminator (default)
Disable active SCSI terminator |
J1002 |
1-2 2-3 |
In In |
Enable SCSI terminator power (default)
Disable SCSI terminator power |
J1401 |
1-2 2-3 |
In In |
FPROM write protect
FPROM write enable (default) |
J1501 |
1-8 |
Out |
JTAG scan connector |
J1502 |
1-2 2-3 |
In In |
External clock (default)
Scan clock |
J3301 |
1-2 2-3 |
In In |
Disable loopback reset
Enable loopback reset (default) |
J3302 |
1-2 2-3 |
In In |
Disable user flash write
Enable user flash write (default) |
J3303 |
1-2 2-3 |
In In |
System flash access by ROMBO
System flash access by J3304 (default) |
J3304 |
1-2 2-3 |
In In |
Boot from user flash0
Boot from system flash (default) |
J3306 |
2-3 |
In |
7-segment LED display bias |
J3401 |
1-3 |
Out |
Header for I2C EEPROM module |
J3601 |
1-3 |
Out |
Header for I2C EEPROM module |
J3602 |
1-3 |
Out |
Header for I2C EEPROM module |
J4703 |
1-2 2-3 |
Out Out |
PLD TDO
cPCI TDO |
J5102 |
1-2 |
Out |
Thermal diode - pins are not installed |
Notes
- The minimum CP1500 and Netra t1 OS is Solaris 2.6 HW 5/98.
- The Operating Environment Installation CD is required to install
Solaris 2.6 HW: 5/98.
- The minimum Netra ct 400 and ct 800 OS is Solaris 8 HW: 6/00.
- The Sun Fire 12K / 15K System Controller uses 501-5473 with
different OBP.
Flash update 501-5473 for use as the Sun Fire 12K / 15K System Controller.
See FIN
I0761-1
for instructions.
- The 501-6064 and 501-6055 include EDO SDRAM Memory.
References
-
Netra ct Server Service Manual, 806-3296.
- SPARCengine CP1500 Technical Reference Manual, 806-2104.
- SPARCengine CP Memory Installation and Configuration, 806-3690.
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