IPX
MIPS
28.5
MFLOPS
4.2
SPECmarks
20.6; w/compiler from Kuck and Associates - 24.4
SPECint92
21.8
SPECfp92
22.5
MEMORY
standard=16, 4 or 16 MB SIMMS, up to 64 MB of
memory
max of 4 memory slots for either of the 4 or 16MB
SIMMS
PROCESSOR
CMOS SPARC single chip; 40 MHz
FPU
intergrated with CMOS SPARC single chip; 40 MHz
CACHE
64K write-through cache
MMU
map up to 8 contexts, 1GB address space in each
PERIPHERALS
1/4" tape, CD-ROM, disk, exobyte (8mm) - scsi
SCSI
micro-miniature, SCSI-2; controller chip 53C90
supports 4 MB/sec (asynch/synch) transfer rates
supports 7 scsi devices; 4 disks, 2 tapes, 1
optional; more supported with addition of SBus card
MONITOR
color - 16 & 19", greyscale 19" (1152x900), 76Hz
PORTS
(2) RS-423/232, audio i/o, ethernet, scsi
serial ports jumpered for 423; synch comm available
with assessory cable (X.25 only)
GRAPHICS
GX built onto CPU board; LSI Logic chip
GX, 8-bit (256 colors), 2D/3D wireframe graphics
480K 2D vectors/sec; 310K 3D vectors/sec;
TAPE
external, QIC-150 MB lunchbox
DISK
internal 207, pre-install w/OS & OW (1 only)
external 207, 424, 1.3 GB drives available
external, 1.3GB; up to 15.6 GB with 12 1.3GB drives
3 1/2" floppy optional
BUS
SBus, 2 slots
color - 1 SBus slots; GX - 1 SBus slot
SBus 20MHz CPU 32 byte bursts in 11 clock cycles=58MB/sec
SBus 20MHz DVMA 16 byte bursts in 9 clock cycles=36MB/sec
OPERATING SYSTEM
4.1.1 or higher; pre-installed on internal disk
POWER
5/2.5 A; 47-63 Hz; 100-120 or 200-240 VAC
PACKAGE
height 4.6', width 9.61', depth 10.4'
ANNOUNCED
July 22, 1991
CODENAME
Hobbes
Date this file was last modified
December 26, 1995